1. Field of the Invention
The present invention is related to method for manufacturing liquid crystal display, and particularly to liquid crystal display using thin film transistor as switching element.
2. Description of the Prior Art
Generally, thin film transistor liquid crystal display has a plurality of unit pixels and thin film transistors corresponding to each of the unit pixels, and thus the high quality, scale-up, and color display of screen and high-speed response can be achieved. Therefore, it is generally used for portable TV, Personal Computer, and navigation appliance of car, and so on.
Thin film transistor is arranged at an intersection region and used as a switching element for selectively controlling on/off operation of pixel electrode.
The conventional method for manufacturing thin film transistor liquid crystal display will be described referring to FIG. 1a through FIG. 1e. 
Firstly, as shown in FIG. 1a, metal layer for gate electrode of prescribed thickness is evaporated on a back substrate 1. And, gate electrode 2a and storage capacitor electrode 2b are formed by patterning the metal layer for gate electrode through a first photolithograph process.
Then, as shown in FIG. 1b, gate insulation layer 3, amorphous silicon layer for channel 4, and doped semiconductor layer for ohmic contact 5 are formed sequentially on the back substrate 1 where the gate electrode 2a and the storage capacitor electrode 2b have been formed. And, the doped semiconductor layer for ohmic contact 5 and amorphous silicon layer for channel 4 are so patterned through a second photolithograph process that a thin film transistor area is defined.
Then, as shown in FIG. 1c, metal layer for source/drain electrode is formed on the back substrate 1 where the thin film transistor area has been defined. And, metal layer for source/drain electrode is so patterned through a third photolithograph process that source electrode 6a and drain electrode 6b are formed on both sides of amorphous silicon layer for channel 4. When the metal layer for source/drain electrode is patterned, the doped semiconductor layer for ohmic contact 5 is so patterned that as the same pattern as source electrode 6a and drain electrode 6b are formed.
Then, as shown in FIG. 1d, a passivation layer 7 of SiNx layer on the back substrate 1 where the source electrode 6a and the drain electrode 6b have been formed. And, the passivation layer 7 is so patterned through a fourth photolithograph process that a prescribed part of drain electrode 6b through is exposed. As a result, via hole h is formed at the exposed portion of drain electrode 6b. 
And then, as shown in FIG. 1e, so as to contact with drain electrode 6b through via hole h, Indium Tin Oxide(ITO) layer is evaporated over the passivation layer 7. And, the ITO layer is so patterned through a fifth photolithograph process that pixel electrode 8 is formed.
However, each photolithograph process includes lots of detailed steps including register coating step, exposure step, development step, etching step, and register removal step and a different photo mask is required at every photolithograph process. Therefore, it is necessary to reduce the number of photolithograph process in order to decrease manufacturing cost and in order to increase yield.
Accordingly, an object of the present invention is to provide a method for manufacturing thin film transistor liquid crystal display which can achieve a reduction in a number of photolithograph process.
1. In order to achieve the above described object, the present method for manufacturing thin film transistor liquid crystal display which have a pixel electrode and a counter electrode which are so formed on a back substrate that a driving electric field is generated in a liquid crystal cell, thin film transistor which has gate electrode, source electrode, and drain electrode and which apply prescribed picture signal between the pixel electrode and the counter electrode, and a storage capacitor electrode connected to the counter electrode, includes the following steps. Firstly, forms a metal layer for gate electrode on the back substrate. Thereafter, patterns the metal layer for gate electrode through a first photolithograph process so that the gate electrode and the storage capacitor electrode may be formed. Thereafter, forms sequentially gate insulation layer, amorphous silicon layer for channel and doped semiconductor layer for ohmic contact, and metal layer for source/drain electrode on the back substrate where the gate electrode and the storage capacitor electrode have been formed. Thereafter, patterns the metal layer for source/drain electrode and the doped semiconductor layer for ohmic contact through a second photolithograph process so that the source electrode, the drain electrode, and the ohmic contacts thereof may be formed. Thereafter, forms a passivation layer on the back substrate where the source electrode and the drain electrode have been formed. Thereafter, patterns the passivation layer, the amorphous silicon layer for channel, and the gate insulation layer through a third photolithograph process so that a part of the drain electrode and the back substrate portion between the storage capacitor electrode and the thin film transistor may be exposed. Thereafter, forms a transparent conductive layer for pixel electrode so as to contact with the exposed portions of the drain electrode and the back substrate. Thereafter, patterns the transparent conductive layer for pixel electrode through a fourth photolithograph process so that a pixel electrode may be formed to contact with the exposed portion of drain electrode.
These and other features, aspects, and advantages of the present invention will become better understood with regard to the following description, appended claims, and accompanying drawings.